In a method of manufacturing a nonvolatile semiconductor memory device, such as a flash memory, there is a step of processing a memory cell area into a fin shape temporarily. With the progress of miniaturization of memory cells, the aspect ratio of a fin-shaped memory cell area in this step is getting higher, causing the problem of, for example, the fin-shaped memory cell area collapsing.
To solve this problem, efforts have been directed toward developing a hybrid structure where a charge storage layer of a memory cell has a floating gate layer and a charge trap layer stacked one on top of the other. The hybrid structure can suppress the height of the charge storage layer and therefore attracts attention as the technique for decreasing the aspect ratio of a fin-shaped memory cell area in a manufacturing process.
However, in a memory cell with the hybrid structure, the threshold voltage of the memory cell after it is written into varies significantly and therefore erroneous reading is liable to take place due to a decrease in the read margin.